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Sc1005 - 10/100 MAC MII/RMII/SMII
- 10/100 MAC
- IEEE 802 compliant
- Full Duplex / Half Duplex
operation
- Options for MII, RMII,
SMII interface
- 256B receive FIFO
- 256B transmit FIFO
- Flow Control from the
FIFO level, or from the System Interface
- Option: 4 exact address
registers and multicast support
- Capable of promiscuous
mode operation for test, switching or special applications
- Per packet append CRC at
transmission (when signaled from the system I/F)
- Programmable options
allow selective reception of MAC control types, oversized and
erroneous packets
- Auto insert Flow-Control
packet based on programmable water mark levels or external pins
- Programmable Inter-Packet
Gap (IFG) and Flow Control value
- Full transmit/receive
statistics
- CPU management interface
- Extensive management
counters for RMON support
- All outputs registered
- System clock. 50 MHz to
200MHz.
Major differentiations: Includes the Application (System) Interface. Small
area. It is suitable for switches. All modes and types have been verified
in silicon.
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